Parasitic-compensated quadrature LC oscillator - Circuits, Devices and Systems, IEE Proceedings [see also IEE Proceedings G- Circuits, Devices and

The paper presents a method for improving the phase noise performance of a CMOS quadrature LC oscillator through parasitic compensation. Owing to the parasitic resistance in the inductor, the LC oscillator suffers from a low Q-value, which degrades its phase noise performance. In this design, through the parasitic-compensation method, the LC oscillator will be made to oscillate at the frequency when the effective impedance of the parallel LC resonator is at the peak. This will increase the Q-value of the LC resonator, which improves the phase noise performance of the circuit. A 2.63GHz quadrature CMOS LC oscillator with a phase noise of –112.3dBc/Hz at 600kHz offset is demonstrated, consuming 7.5mW of power using an on-chip spiral inductor model.